(1) Field of the Invention
The present invention relates to a hetero-junction bipolar transistor and its manufacturing method.
(2) Description of the Related Art
A hetero-junction bipolar transistor (hereinafter referred to as HBT) using a semiconductor of a large band gap as an emitter has been commercially utilized for a high-frequency analogue element of a cell phone and the like. Especially, an InGaP/GaAs HBT using InGaP as an emitter has low dependency to temperature. Therefore, it is expected that the InGaP/GaAs HBT as a device with high reliability will be used in increasingly wider application areas.
Hereinafter, using figures, the device structure and its manufacturing method of a general InGaP/GaAs HBT is explained. (For example, refer to Japanese Laid-Open Patent Application No. 2000-260783).
FIG. 1 is a cross-sectional diagram showing an npn-type InGaP/GaAs HBT.
As is shown in FIG. 1, the InGaP/GaAs HBT is composed of: a semi-insulating GaAs semiconductor substrate 400; an n+-type GaAs sub-collector layer 410 formed on the semiconductor substrate 400 by doping an n-type dopant with high concentration; a first step layer 420 formed to be a salient on a predetermined region of the sub-collector layer 410; a second step layer 430 formed to be the second salient on a predetermined region of the first step layer 420; an emitter electrode 440 formed on the second step layer 430, for example, made of Ti/Pt/Au; base electrodes 450, made of a multi-layer metal and the like including Pt, formed in exposed areas on the first step layer 420 on the periphery of the second step layer 430 by defusing thermally so as to come in contact with a base layer 422; collector electrodes 460, made of AuGe/Ni/Au and the like formed on exposed areas on the sub-collector layer 410; and element isolation regions 470 formed in regions on the periphery of elements so as to reach the semiconductor substrate 400 through the sub-collector layer 410 by ion implantation and inactive heat-treating, for isolating a unit HBT electrically.
Here, the first step layer 420 is laminated with a non-doped or n-type GaAs collector layer 421 of low dopant concentration, a p-type GaAs base layer 422 of high dopant concentration, and an n-type InGaP emitter layer 423 in sequence.
Additionally, the second step layer 430 is laminated with n-type GaAs emitter cap layer 431 and an n-type InGaAs emitter contact layer 432 of low contact resistance in sequence.
By the way, applicability of an InGaP/GaAs-system HBT has been widened in recent years and high output and high resistance to breakdown are required for the HBT. For example, as for a transmitting amplifier of a cell phone specifically, when the HBT is commercially utilized as a power device of a terminal transmitter of the GSM-system, not the conventional CDMA-system, it is required that the HBT is not broken at the high output of 3 to 4 W. In other words, it is required that the HBT is not broken at VSWR (Voltage Standing Ratio)=10:1.
However, there is a problem that a conventional InGaP/GaAs-system HBT cannot satisfy high resistance required to avoid a potential breakdown of the HBT with high output.
Here, using FIGS. 2 and 3, the breakdown of the HBT with the high output is explained.
FIG. 2 is a diagram showing collector voltage VC-collector current IC characteristic and breakdown voltage curve of the InGaP/GaAs-system HBT. By the way, the VC-IC characteristic is different at each base current IB, and the breakdown voltage curve is drawn by plotting the points when the HBT is broken at each base current IB.
It is thinkable from FIG. 2 that the breakdown of the HBT can be divided into breakdowns at a high current region A and a low current region B, and the breakdown of the HBT with high output is caused by overlapping of load curves in a breakdown region at collector voltage of about 6V in the high current region A.
FIG. 3A–FIG. 3C show the results of the electric field simulations done by the inventor. In FIG. 3A–FIG. 3C, a horizontal axis shows a distance from the surface of the emitter layer to the sub-collector layer; the vertical axis shows an electric field density at each current value. More specifically, FIG. 3A shows the electric field density in the low current region B (for example, IB=1 μA, VC=3.5V). FIG. 3B shows the electric field density between the high current region A and the low current region B (for example, IB=10 μA, VC=3.5V). FIG. 3C shows the electric field density in the high current region A (for example, IB=34 μA, VC=3.5V).
It is apparent from FIG. 3 that the largest electric field density is applied to the base-collector interface in the low current region B and the avalanche breakdown which causes the breakdown is produced at the base-collector interface (FIG. 3A). When the current increases and electrons of higher density than the collector density is injected (Kirk effect), the region to which the largest electric field is applied shifts from the base side to the sub-collector side (FIG. 3B). When the current further increases, the largest electric field is applied to the collector-sub-collector interface (FIG. 3C) and an avalanche breakdown is produced at the collector-sub-collector interface. This phenomenon is described in detail on Page 147 of the reference book 2nd edition of “Semiconductor Devices” written by A. Sze.
The above explanation shows that the production of avalanche breakdown at the collector-sub-collector interface causes the breakdown of the HBT with high output.